All of this indicates, that Intel breaks TICK-TOCK strategy - instead of issuing two processors in a single process, Concern has increased this technology to three generations of processors. The new assumption is made also apply to models 10 nm lithography.
Until now, manufacturers make processors within TICK-TOCK strategy, where step TICK signified reduction process, TOCK and step introducing a new microarchitecture. for example, Sandy Bridge processors have introduced a new microarchitecture, Ivy Bridge reduced lithograph, Haswell microarchitecture introduced yet, Broadwell again reduced lithography and current Skylake model introduced a new microarchitecture (while maintaining the 14-nanometer lithography).
What awaits us after the schemes for generation of Skylake? In the second half of this year is scheduled the premiere models-Kaby Lake City, which will continue to rely on Skylake microarchitecture and will be implemented in 14-nm lithography. In this way, we can talk about the current generation of updating and fracture TICK-TOCK strategy (although the manufacturer promised the introduction of some improvements in terms of performance).
Recent leaks suggest, that it will not be a one-time event. In the next year we will see Cannonlake processors in 10 nm lithography, and a year later there will be Icelake models based on the new microarchitecture. AT 2019 Again, the time comes to improve processor - this time it will be a model codenamed Tigerlake, which will build on and mikroarchitekturu Icelake 10 nm lithography. Later, probably, wait layouts 7-nanometer lithography, но придет нам на немного подождать – it will happen no earlier than 2020 year.
It looks like this in such a way that the introduction of lower production processes takes more time, and the solution to this problem may be the issuance of the updated processors. The only question is whether such a rush we really need?
